1. Field of the Invention
The invention relates to a method for fabricating a through-silicon via structure, and more particularly, to a method of removing excess water vapor from a liner oxide before the formation of a through-silicon via electrode.
2. Description of the Prior Art
The through-silicon via (TSV) technique is a novel semiconductor technique. The through-silicon via technique mainly servers to solve the problem of electrical interconnection between chips and belongs to a new 3D packing field. The through-silicon via technique produces products that meet the market trends of “light, thin, short and small” through the 3D stacking technique and also provides wafer-level packages utilized in micro electronic mechanic system (MEMS), and photoelectronics and electronic devices.
The through-silicon via technique drills holes in the wafer by etching or laser then fills the holes with conductive materials, such as copper, polysilicon or tungsten to form vias, i.e. conductive channels connecting inner regions and outer regions. The wafer or the dice is then thinned to be stacked or bonded together to form a 3D stack IC. By using this approach, the wire bonding procedure could be omitted. Using etching or laser to form conductive vias not only omits the wire bonding but also shrinks the occupied area on the circuit board and the volume for packing. The inner connection distance of the package created by using the through-silicon via technique, i.e. the thickness of the thinned wafer or the dice, is much shorter compared with the conventional stack package of wire bonding type. The performance of the 3D stack IC would therefore be much better in many ways, including faster transmission, and lower noise. The advantage of the shorter inner connection distance of the through-silicon via technique becomes much more pronounced in CPU, flash memory and memory card. As the 3D stack IC could be fabricated to equate the size of the dice, the utilization of through-silicon via technique becomes much more valuable in the portable electronic device industry.
Conventional approach of fabricating a TSV electrode typically forms a metal-oxide semiconductor (MOS) transistor, such as a CMOS transistor on a semiconductor substrate, forms a TSV in the interlayer dielectric layer and the semiconductor substrate, covers a liner on the sidewall of the TSV, and then fills the TSV with material such as copper for forming a TSV electrode. Unfortunately, the liner deposited in the TSV typically adsorbs water vapor during the fabrication. As a result, barrier layer and seed layer deposited thereafter could not adhere onto the surface of the liner effectively and result in issue such as copper crack.